qwenGPU compiles 4-lane SIMT GPU into Qwen3.5-2B as 45 untrained layers

qwenGPU embeds a 4-lane SIMT GPU into Qwen3.5-2B as 45 compiled, untrained layers, with the model writing each step of real CUDA launches itself and using Gated DeltaNet state as registers and memory.

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2026-11-02 07:28 · MarkTechPost
Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA

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